High-level synthesis or “HLS” is a computer-automated design process in which a description of desired behavior of a system is converted into a circuit design and/or circuitry. The description of the desired behavior is typically written as an application in a high-level programming language such as C, C++, OpenCL, and so forth. The application may be translated into a circuit design that may be specified as a register transfer level (RTL) description. The circuit design describes a synchronous digital circuit in terms of the flow of digital signals between hardware registers and the operations performed on those signals. The circuit design may be processed (e.g., synthesized, placed, and routed) through a design flow. Further, the processed circuit design may be implemented within an integrated circuit.
HLS is often used to hardware accelerate executable program code. For example, rather than executing a particular function as software using a central processing unit (CPU) or other processor capable of executing program code, the function may be implemented as a dedicated circuit also referred to as a hardware accelerator. While hardware acceleration often results in faster systems, some disadvantages do exist. In some cases, for example, certain code structures and/or coding techniques used in applications are not supported by HLS systems. Use of such structures and/or techniques may prevent the HLS system from transforming the application into hardware.
In other cases, as more functions are hardware accelerated, getting multiple hardware accelerators to interact with one another in an efficient manner can be difficult. HLS systems do attempt to combine multiple hardware accelerators together into a larger system. In doing so, however, the HLS systems often rely on a worst-case analysis of data dependencies among the hardware accelerators. This can result in inefficient circuit architectures.